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IS31FL3218 integrated silicon solution, inc. ? www.issi.com 1 rev.b, 03/28/2012 18 channels led driver april 2012 general description IS31FL3218 is comprised of 18 constant current channels each with independent pwm control, designed for driving leds. the output current of each channel can be set at up to 38ma (max.) by an external resistor. the average led current of each channel can be changed in 256 steps by changing the pwm duty cycle through an i2c interface. the chip can be turned off by pulling the sdb pin low or by using the software shutdown feature to reduce power consumption. the slave address is fixed ?1010 1000?. IS31FL3218 is available in qfn-24 (4mm 4mm) and sop-24. it operates from 2.7v to 5.5v over the temperature range of -40c to +85c. features ? 2.7v to 5.5v supply ? i2c interface, automatic address increment function ? internal reset register ? modulate led brightness with 256 steps pwm ? each channel can be controlled independently ? -40c to +85c temperature range ? qfn-24 (4mm 4mm), sop-24 package applications ? mobile phones and other hand-held devices for led display ? led in home appliances typical application circuit sda scl r_ext sdb IS31FL3218 out16 out15 out14 out13 out12 out1 out2 out3 out4 out5 out6 out7 out8 out9 out10 out11 v battery vcc gnd 1 f 0.1 f micro controller 4.7k 4.7k vdd 3 5 6 24 2 4 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 100k out18 out17 23 1 3.3k v battery figure 1 typical application circuit note: the maximum output current is set up to 23ma when r ext = 3.3k ? . the maximum output current can be set by external resistor, r ext . please refer to the detail information in page 9. note: the ic should be placed far away from the mobile antenna in order to prevent the emi.
IS31FL3218 integrated silicon solution, inc. ? www.issi.com 2 rev.b, 03/28/2012 pin configuration package pin configuration (top view) qfn-24 sop-24 pin description no. pin description 1 out18 output channel for leds. 2 r_ext input terminal used to connect an external resistor. this regulates the output current. 3 vcc power supply. 4 gnd ground. 5 sda i2c serial data. 6 scl i2c serial clock. 7~23 out1 ~ out17 output channel for leds. 24 sdb shutdown the chip when pulled low. thermal pad connect to gnd.
IS31FL3218 integrated silicon solution, inc. ? www.issi.com 3 rev.b, 03/28/2012 ordering information industrial range: -40c to +85c order part no. package qty IS31FL3218-qfls2-tr IS31FL3218-grls2 qfn-24, lead-free sop-24, lead-free 2500/reel 30/tube copyright ? ? ? 2011 ? integrated ? silicon ? solution, ? inc. ? all ? rights ? reserved. ? issi ? reserves ? the ? right ? to ? make ? changes ? to ? this ? specification ? and ? its ? products ? at ? any ? time ? without ? notice. ? issi ? assumes ? no ? liability ? arising ? out ? of ? the ? application ? or ? use ? of ? any ? information, ? products ? or ? services ? described ? herein. ? customers ? are ? advised ? to ? obtain ? the ? latest ? version ? of ? this ? device ? specification ? before ? relying ? on ? any ? published ? information ? and ? before ? placing ? orders ? for ? products. ? integrated ? silicon ? solution, ? inc. ? does ? not ? recommend ? the ? use ? of ? any ? of ? its ? products ? in ? life ? support ? applications ? where ? the ? failure ? or ? malfunction ? of ? the ? product ? can ? reasonably ? be ? expected ? to ? cause ? failure ? of ? the ? life ? support ? system ? or ? to ? significantly ? affect ? its ? safety ? or ? effectiveness. ? products ? are ? not ? authorized ? for ? use ? in ? such ? applications ? unless ? integrated ? silicon ? solution, ? inc. ? receives ? written ? assurance ? to ? its ? satisfaction, ? that: ? a.) ? the ? risk ? of ? injury ? or ? damage ? has ? been ? minimized; ? b.) ? the ? user ? assume ? all ? such ? risks; ? and ? c.) ? potential ? liability ? of ? integrated ? silicon ? solution, ? inc ? is ? adequately ? protected ? under ? the ? circumstances
IS31FL3218 integrated silicon solution, inc. ? www.issi.com 4 rev.b, 03/28/2012 absolute maximum ratings supply voltage, v cc - 0.3v ~ +6.0v voltage at scl, sda, sdb - 0.3v ~ v cc +0.3v voltage at out1 to out18 +5v maximum j unction temperature, t jmax 150c storage temperature range, t stg - 65c ~ +150c operating temperature range, t a ? 40c ~ +85c esd (hbm) 4kv note: stresses beyond those listed under ?absolute maximum ratings? may cause permanent damage to the device. these are stress rating s only and functional operation of the device at these or any other condition beyond those indicated in the operational sections of the sp ecifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. electrical characteristics t a = -40c ~ +85c, v cc = 2.7v ~ 5.5v, unless otherwise noted. typical values are t a = 25c, v cc = 3.6v. symbol parameter condition min. typ. max. unit v cc supply voltage 2.7 5.5 v i max maximum output current of each channel v cc = 4.2v, v out = 0.8v r ext = 2k ? (note 1) 38 ma i cc quiescent power supply current r ext = 3.3k ? 5.25 ma i sd shutdown current v sdb = 0v or software shutdown 3.1 a i oz output leakage current v sdb = 0v or software shutdown, v out = 5v 1 a v ext output voltage of r-ext pin 1.3 v logic electrical characteri stics (sda, scl, sdb) v il logic ?0? input voltage v cc = 2.7v 0.4 v v ih logic ?1? input voltage v cc = 5.5v 1.4 v i il logic ?0? input current 5 (note 2) na i ih logic ?1? input current 5 (note 2) na
IS31FL3218 integrated silicon solution, inc. ? www.issi.com 5 rev.b, 03/28/2012 digital input switching characteristics (note 2) symbol parameter condition min. typ. max. unit f scl serial-clock frequency 400 khz t buf bus free time between a stop and a start condition 1.3 s t hd, sta hold time (repeated) start condition 0.6 s t su, sta repeated start condition setup time 0.6 s t su, sto stop condition setup time 0.6 s t hd, dat data hold time 0.9 s t su, dat data setup time 100 ns t low scl clock low period 1.3 s t high scl clock high period 0.7 s t r rise time of both sda and scl signals, receiving (note 3) 20+0.1cb 300 ns t f fall time of both sda and scl signals, receiving (note 3) 20+0.1cb 300 ns note 1: the recommended minimum value of r ext is 2k ? , or it may cause a large current. note 2: guaranteed by design. note 3: cb = total capacitance of one bus line in pf. i sink 6ma. t r and t f measured between 0.3 v cc and 0.7 v cc .
IS31FL3218 integrated silicon solution, inc. ? www.issi.com 6 rev.b, 03/28/2012 detailed description i2c interface the IS31FL3218 uses a serial bus, which conforms to the i2c protocol, to control the chip?s functions with two wires: scl and sda. the IS31FL3218?s slave address is ?1010 1000?. it only supports write operations. the scl line is uni-directional. the sda line is bi-directional (open-collector) with a pull-up resistor (typically 4.7k ? ). the maximum clock frequency specified by the i2c standard is 400khz. in this discussion, the master is the microcontroller and the slave is the IS31FL3218. the timing diagram for the i2c is shown in figure 2. the sda is latched in on the stable high level of the scl . when there is no interface activity, the sda line should be held high. the ?start? signal is generated by lowering the sda signal while the scl signal is high. the start signal will alert all devices attached to the i2c bus to check the incoming address against their own chip address. the 8-bit chip address is sent next, most significant bit first. each address bit must be stable while the scl level is high. after the last bit of the chip address is sent, the master checks for the IS31FL3218?s acknowledge. the master releases the sda line high (through a pull-up resistor). then the master sends an scl pulse. if the IS31FL3218 has received the address correctly, then it holds the sda line low during the scl pulse. if the sda line is not low, then the master should send a ?stop? signal (discussed later) and abort the transfer. following acknowledge of IS31FL3218, the register address byte is sent, most significant bit first. IS31FL3218 must generate another acknowledge indicating that the register address has been received. then 8-bit of data byte are sent next, most significant bit first. each data bit should be valid while the scl level is stable high. after the data byte is sent, the IS31FL3218 must generate another acknowledge to indicate that the data was received. the ?stop? signal ends the transfer. to signal ?stop?, the sda signal goes high while the scl signal is high. address auto increment to write multiple bytes of data into IS31FL3218, load the address of the data register that the first data byte is intended for. during the IS31FL3218 acknowledge of receiving the data byte, the internal address pointer will increment by one. the next data byte sent to IS31FL3218 will be placed in the new address, and so on. the auto increment of the address will continue as long as data continues to be written to IS31FL3218 (figure 5). figure 2 interface timing data line stable; data valid change of data allowed scl sda figure 3 bit transfer figure 4 writing to IS31FL3218(typical)
IS31FL3218 integrated silicon solution, inc. ? www.issi.com 7 rev.b, 03/28/2012 figure 5 writing to IS31FL3218(automatic address increment) registers definitions table 1 register function address name function table default 00h shutdown register set software shutdown mode 2 0000 0000 01h~12h pwm register 18 channels pwm duty cycle data register 3 13h led control register1 channel 1 to 6 enable bit 4 14h led control register2 channel 7 to 12 enable bit 5 15h led control register3 channel 13 to 18 enable bit 6 16h update register load pwm register and led control register?s data - xxxx xxxx 17h reset register reset all registers into default - table 2 00h shutdown register bit d7:d1 d0 name reserved ssd default 000000 0 the shutdown register sets software shutdown mode of IS31FL3218. ssd software shutdown enable 0 software shutdown mode 1 normal operation table 3 01h~12h pwm register(out1~out18) bit d7:d0 name pwm default 0000 0000 the pwm registers adjusts led luminous intensity in 256 steps. the value of a channel?s pwm register decides the average output current for each output, out1~out18. the average output current may be computed using the formula (1): ? ? ? ? ? 7 0 out 2 ] [ 256 i n n max n d i (1) where ?n? indicates the bit location in the respective pwm register. for example: d7:d0 = 10110101, i out = i max (2 0 +2 2 +2 4 +2 5 +2 7 )/256 see formula (2) in page 9 to calculate the i max. table 4 13h led control register 1 (out1~out6) bit d7:d6 d5:d0 name reserved out6:out1 default 00 000000 table 5 14h led control register 2 (out7~out12) bit d7:d6 d5:d0 name reserved out12:out7 default 00 000000
IS31FL3218 integrated silicon solution, inc. ? www.issi.com 8 rev.b, 03/28/2012 table 6 15h led control register 3 (out13~out18) bit d7:d6 d5:d0 name reserved out18:out13 default 00 000000 the led control registers store the on or off state of each column led. outx led state 0 led off 1 led on 16h pwm update register the data sent to the pwm registers and the led control registers will be stored in temporary registers. a write operation of any 8-bit value to the update register is required to update the registers (01h~15h). 17h reset register once user writes any 8-bit data to the reset register, IS31FL3218 will reset all registers to default value. on initial power-up, the IS31FL3218 registers are reset to their default values for a blank display.
IS31FL3218 integrated silicon solution, inc. ? www.issi.com 9 rev.b, 03/28/2012 application information pwm control the pwm registers (01h~12h) can modulate led brightness of 18 channels with 256 steps. for example, if the data in pwm register is ?0000 0100?, then the pwm is the fourth step. writing new data continuously to the registers can modulate the brightness of the leds to achieve a breathing effect. r ext the maximum output current of out1~out18 can be adjusted by the external resistor, r ext , as described in formula (2). ext ext max r v x i ? ? (2) x = 58.5, v out = 0.8v, v ext = 1.3v. the recommended minimum value of r ext is 2k ? . gamma correction in order to perform a better visual led breathing effect we recommend using a gamma corrected pwm value to set the led intensity. this results in a reduced number of steps for the led intensity setting, but causes the change in intensity to appear more linear to the human eye. gamma correction, also known as gamma compression or encoding, is used to encode linear luminance to match the non-linear characteristics of display. since the IS31FL3218 can modulate the brightness of the leds with 256 steps, a gamma correction function can be applied when computing each subsequent led intensity setting such that the changes in brightness matches the human eye's brightness curve. table 7 32 gamma steps with 256 pwm steps c(0) c(1) c(2) c(3) c(4) c(5) c(6) c(7) 0 1 2 4 6 10 13 18 c(8) c(9) c(10) c(11) c(12) c(13) c(14) c(15) 22 28 33 39 46 53 61 69 c(16) c(17) c(18) c(19) c(20) c(21) c(22) c(23) 78 86 96 106 116 126 138 149 c(24) c(25) c(26) c(27) c(28) c(29) c(30) c(31) 161 173 186 199 212 226 240 255 0 32 64 96 128 160 192 224 256 0 4 8 121620242832 pwm data intensity steps figure 6 gamma correction(32 steps) choosing more gamma steps provides for a more continuous looking breathing effect. this is useful for very long breathing cycles. the recommended configuration is defined by the breath cycle t. when t=1s, choose 32 gamma steps, when t=2s, choose 64 gamma steps. the user must decide the final number of gamma steps not only by the led itself, but also based on the visual performance of the finished product. table 8 64 gamma steps with 256 pwm steps c(0) c(1) c(2) c(3) c(4) c(5) c(6) c(7) 0 1 2 3 4 5 6 7 c(8) c(9) c(10) c(11) c(12) c(13) c(14) c(15) 8 10 12 14 16 18 20 22 c(16) c(17) c(18) c(19) c(20) c(21) c(22) c(23) 24 26 29 32 35 38 41 44 c(24) c(25) c(26) c(27) c(28) c(29) c(30) c(31) 47 50 53 57 61 65 69 73 c(32) c(33) c(34) c(35) c(36) c(37) c(38) c(39) 77 81 85 89 94 99 104 109 c(40) c(41) c(42) c(43) c(44) c(45) c(46) c(47) 114 119 124 129 134 140 146 152 c(48) c(49) c(50) c(51) c(52) c(53) c(54) c(55) 158 164 170 176 182 188 195 202 c(56) c(57) c(58) c(59) c(60) c(61) c(62) c(63) 209 216 223 230 237 244 251 255
IS31FL3218 integrated silicon solution, inc. ? www.issi.com 10 rev.b, 03/28/2012 0 32 64 96 128 160 192 224 256 0 8 16 24 32 40 48 56 64 pwm data intensity steps figure 7 gamma correction(64 steps) note, the data of 32 gamma steps is the standard value and the data of 64 gamma steps is the recommended value. shutdown mode shutdown mode can either be used as a means of reducing power consumption or generating a flashing display (repeatedly entering and leaving shutdown mode). during shutdown mode all registers retain their data. software shutdown by setting ssd bit of the configuration register (00h) to ?0?, the IS31FL3218 will operate in software shutdown mode, wherein they consume only 3.1 a (typ.) current. when the IS31FL3218 is in software shutdown mode, all current sources are switched off. hardware shutdown the chip enters hardware shutdown mode when the sdb pin is pulled low.
IS31FL3218 integrated silicon solution, inc. ? www.issi.com 11 rev.b, 03/28/2012 classification reflow profiles profile feature pb-free assembly preheat & soak temperature min (tsmin) temperature max (tsmax) time (tsmin to tsmax) (ts) 150c 200c 60-120 seconds average ramp-up rate (tsmax to tp) 3c/second max. liquidous temperature (tl) time at liquidous (tl) 217c 60-150 seconds peak package body temperature (tp)* max 260c time (tp)** within 5c of the specified classification temperature (tc) max 30 seconds average ramp-down rate (tp to tsmax) 6c/second max. time 25c to peak temperature 8 minutes max. figure 8 classification profile
IS31FL3218 integrated silicon solution, inc. ? www.issi.com 12 rev.b, 03/28/2012 package information qfn-24 note: all dimensions in millimeters unless otherwise stated.
IS31FL3218 integrated silicon solution, inc. ? www.issi.com 13 rev.b, 03/28/2012 sop-24

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